Applied Methods
~The MetaPhysical SystemsChip & Silicon Engineer

Chip & Silicon Engineer

Engineers in this role lead the validation and characterization of advanced AI accelerator chips after they return from manufacturing, working across silicon, firmware, and platform layers to prove functional correctness and performance under production conditions. They distinguish themselves by combining hands-on silicon debugging expertise with the ability to coordinate complex cross-domain issues spanning hardware, software, and systems integration—moving beyond traditional post-silicon testing to architect validation strategies for next-generation high-performance SoCs. These roles typically sit within Manufacturing Operations or Architecture and Validation teams at semiconductor-focused AI companies, collaborating closely with logical design, physical design, verification, and software teams to translate silicon specification into reliably deployed products at scale.

$ titles --canonical
SoC ArchitectRTL Design EngineerPhysical Design EngineerSilicon Verification EngineerASIC Design EngineerFPGA EngineerPost Silicon Validation EngineerAdvanced Packaging TechnologistSilicon Emulation EngineerStaff SoC ArchitectAI Silicon Physical Design Engineer
Open Jobs50
Companies Hiring7
$02

Skills

What companies are looking for in this role.

$ skills --core

Designing and implementing register transfer level (RTL) logic for semiconductor devices

95%

Developing microarchitecture specifications and implementations for high-performance processors

92%

Optimizing chip designs for power consumption, performance, and area efficiency

90%

Performing functional verification and coverage analysis of digital logic designs

90%

Executing physical design and place-and-route optimization for silicon chips

88%

Architecting system-on-chip (SoC) designs and sub-system integration

88%

Debugging complex failures spanning silicon, firmware, and software layers

85%

Conducting post-silicon validation and bring-up of manufactured silicon devices

85%

Defining and executing silicon verification strategies and test methodologies

85%

Conducting design rule checking, layout versus schematic verification, and electrical rule checking

82%

Performing timing closure and signal integrity analysis on high-speed designs

80%

Developing test infrastructure and automated test frameworks for silicon validation

80%

Planning and executing test coverage strategies to achieve verification sign-off

80%

Analyzing and resolving power delivery and electromagnetic effects in silicon designs

78%

Developing firmware and low-level software for silicon bring-up and validation

78%

Designing advanced semiconductor packaging architectures including 2.5D and 3D integration

75%

Architecting high-bandwidth interconnects and interface solutions for system integration

72%
$ skills --emerging

Developing full-system simulation models for architecture exploration and pre-silicon validation

72%

Optimizing designs for AI workloads and machine learning inference performance

70%

Creating CI/CD workflows and infrastructure for continuous validation and integration

65%
$ skills --soft

Collaborating across hardware, software, and systems teams to resolve cross-domain technical issues

88%

Leading and mentoring engineering teams through complex silicon development programs

85%

Translating product requirements into technical specifications and design trade-offs

82%

Establishing design methodologies, processes, and best practices for silicon teams

78%

Communicating technical progress and status to program management and stakeholders

75%

Managing external vendor relationships for ASIC and foundry services

68%
$03

Technology

The tools and technologies that define this role.

$ tech --language
Pythonvery high
SystemVerilogvery high
Chigh
C++high
Veriloghigh
Assemblymoderate
HTMLlow
JavaScriptlow
SQLlow
XMLlow
XPathlow
XSLTlow
$ tech --framework
UVMhigh
LLVMmoderate
SVAmoderate
$ tech --platform
Linuxvery high
Synopsysvery high
Cadencehigh
FPGAmoderate
$ tech --tool
Calibrehigh
Githigh
DRMSmoderate
GCCmoderate
ICVmoderate
SGEmoderate
$ tech --concept
ASICvery high
RTLvery high
SoCvery high
Coverage analysishigh
DFThigh
Power deliveryhigh
Signal integrityhigh
Simulationhigh
Timing closurehigh
2.5D integrationmoderate
3D stackingmoderate
Emulationmoderate
Floor planningmoderate
Heterogeneous integrationmoderate
Thermal managementmoderate
$04

Open Jobs

50 open Chip & Silicon Engineer jobs across 7 companies.

Cerebras Systems18h
Physical Design Engineer
Bengaluru, Karnataka, India·Physical Systems
Block1d
ASIC Validation Engineer
Toronto, Ontario, Canada·Physical Systems
Graphcore1w
Senior Silicon Logical Design Engineer - Bengaluru
Bengaluru, India·Physical Systems
OpenAI1w
SOC Architect
San Francisco·Physical Systems
OpenAI2w
Silicon Implementation Technologist
San Francisco·Physical Systems
Block2w
ASIC Validation Engineer
Bay Area, CA, United States of America·Physical Systems
Graphcore2w
Staff Bring-Up and Characterisation Engineer
Austin, Texas, United States·Physical Systems
Graphcore2w
Staff Engineer - Platform Bring-up and Validation
Austin, Texas, United States·Physical Systems
Graphcore2w
Staff Engineer - Server Hardware Compute Blade and Rack Validation Lead
Austin, Texas, United States·Physical Systems
Graphcore2w
Tech Director, Post Silicon Validation
Bristol, UK·Physical Systems
Graphcore2w
Senior Bring-Up and Characterisation Engineer
Austin, Texas, United States·Physical Systems
Block2w
Foundry Interface Engineer
Singapore, Singapore·Physical Systems
Graphcore3w
Senior Bring-Up and Characterisation Engineer - Bengaluru
Bengaluru, India·Physical Systems
Graphcore3w
Senior Bring-Up and Characterisation Engineer - Bengaluru, Multiple Vacancies
Bengaluru, India·Physical Systems
Graphcore3w
Staff Bring-Up and Characterisation Engineer
Austin, Texas, United States·Physical Systems
Graphcore3w
Senior Bring-Up and Characterisation Engineer
Austin, Texas, United States·Physical Systems
Arena Physica1mo
Electrical Engineer, Analog/RF Layout Engineer
New York·Physical Systems
Graphcore1mo
Director, Silicon Logical Design
Bristol, UK; Cambridge, UK·Physical Systems
Graphcore1mo
Staff SoC Architect
Bristol, UK·Physical Systems
Graphcore1mo
Principal SoC Architect
Bristol, UK·Physical Systems