Applied Methods
~The MetaPhysical SystemsChip & Silicon Engineer

Chip & Silicon Engineer

Chip & Silicon Engineers at AI companies work across the chip-design lifecycle for AI accelerators and supporting silicon—from RTL and microarchitecture through physical design, verification, and post-silicon validation. The role spans front-end design (architecting blocks, writing RTL, running simulation), physical design (synthesis, place-and-route, timing closure, power-performance-area optimization), and post-silicon work (bring-up, characterization, debug across hardware, firmware, and software layers). Specialization within this slug varies—some engineers focus narrowly on one phase of the pipeline, others coordinate across phases—but the population spans the full chain rather than concentrating on any single stage. These engineers typically sit within silicon, hardware, or platform engineering organizations at chip-focused AI companies, collaborating closely with verification, software, and systems teams to deliver production silicon.

$ titles --canonical
SoC ArchitectRTL Design EngineerPhysical Design EngineerSilicon Verification EngineerASIC Design EngineerFPGA EngineerPost Silicon Validation EngineerAdvanced Packaging TechnologistSilicon Emulation EngineerStaff SoC ArchitectAI Silicon Physical Design Engineer
Open Jobs83
Companies Hiring12
$02

Skills

What companies are looking for in this role.

$ skills --core

Designing and executing comprehensive validation test plans across functional, performance, stress, and corner-case scenarios

95%

Performing silicon bring-up, debug, and characterization of advanced semiconductor devices

92%

Developing custom microarchitecture and RTL designs for system-on-chip implementations

90%

Analyzing and debugging complex issues across hardware, firmware, and software integration domains

90%

Automating test execution, orchestration, and data analysis using scripting and programming

88%

Translating hardware specifications and features into structured, parameterized test cases with clear success criteria

88%

Validating and optimizing high-speed interfaces, memory subsystems, and interconnect performance

87%

Performing root-cause analysis and failure diagnosis across multiple system hierarchies

86%

Tuning workload parameters and configuring test scenarios for comprehensive system coverage

85%

Implementing physical design workflows including synthesis, place and route, and timing closure

85%

Defining system-level architecture and technical roadmaps for custom silicon solutions

82%

Validating signal integrity, power delivery, and mechanical reliability in complex systems

82%

Building and maintaining hardware test infrastructure including lab automation and instrumentation

80%

Evaluating and selecting appropriate benchmarking tools and defining workload models

80%

Performing hardware and software co-design to optimize system performance and power consumption

78%

Conducting multi-physics modeling and simulation across thermal, mechanical, and electrical domains

78%

Conducting reliability assessment and electromigration analysis for advanced packaging systems

75%

Supporting manufacturing operations and early production validation efforts

72%
$ skills --emerging

Developing AI-accelerator architectures optimized for inference workloads and energy efficiency

72%

Designing heterogeneous integration architectures for chiplet-based and 3D packaging systems

68%
$ skills --soft

Communicating technical findings and recommendations to cross-functional stakeholders and customer teams

78%

Leading cross-functional teams and providing technical mentorship on chip and system design

75%

Establishing verification methodologies, standards, and frameworks across engineering organizations

72%

Operating effectively in agile development environments with aggressive schedules and milestones

68%
$03

Technology

The tools and technologies that define this role.

$ tech --language
Pythonvery high
Chigh
C++high
Veriloghigh
SystemVerilogmoderate
VHDLmoderate
$ tech --platform
FPGAvery high
Linuxhigh
GPUmoderate
$ tech --tool
EDAhigh
fiohigh
iperfhigh
Stress-nghigh
sysbenchhigh
Cadencemoderate
Lmbenchmoderate
Synopsysmoderate
Thermal modelingmoderate
$ tech --concept
ARMvery high
RTLvery high
SoCvery high
ASIChigh
DDRhigh
PCIehigh
2.5D packagingmoderate
3D packagingmoderate
CDCmoderate
Ethernetmoderate
HBMmoderate
HPCmoderate
I2Cmoderate
LPDDR5moderate
NPUmoderate
NUMAmoderate
RDCmoderate
SPImoderate
UARTmoderate
MAClow
PHYlow
Radiation hardeninglow
Wafer scalelow
$04

Open Jobs

83 open Chip & Silicon Engineer jobs across 12 companies.

Graphcore1w
Staff System Tests & Diagnostics Engineer
Austin, Texas, United States·Physical Systems
Graphcore1w
Technical Lead - System Tests & Diagnostics Engineer
Austin, Texas, United States·Physical Systems
Graphcore1w
Senior System Tests & Diagnostics Engineer
Austin, Texas, United States·Physical Systems
Waymo1w
ML ASIC Design Engineer
Mountain View, California; New York City, NY·Physical Systems
Waymo2w
Staff SoC Design Engineer
Mountain View, CA, USA·Physical Systems
Anthropic2w
Silicon Engineer
San Francisco, CA | New York City, NY | Seattle, WA·Physical Systems
Graphcore2w
Director of Characterisation
Austin, Texas, United States; Bristol, UK·Physical Systems
Graphcore3w
Lead Bring-up & Characterisation Engineer
Bristol, UK·Physical Systems
Graphcore3w
Senior Physical Design Engineer - Bengaluru, Multiple Vacancies
Bengaluru, India·Physical Systems
Graphcore3w
Staff Systems Bring Up Engineer
Austin, Texas, United States·Physical Systems
Graphcore3w
Senior SLT Test Engineer
Austin, Texas, United States·Physical Systems
Shield AI3w
Staff Engineer, FPGA Design (R5347)
Dallas, Texas·Physical Systems
Waymo1mo
Silicon Validation Manager
Bangalore, Karnataka, India·Physical Systems
Graphcore1mo
Staff Silicon Logical Design Engineer - Bengaluru, Multiple Vacancies
Bengaluru, India·Physical Systems
CHAOS Industries1mo
Staff RF Signal Processing Engineer
Washington, District of Columbia, United States·Physical Systems
Graphcore1mo
SoC Architect
Bristol, UK·Physical Systems
Waymo1mo
Staff Silicon Product Engineer
Taipei, Taiwan·Physical Systems
Graphcore1mo
Staff/Principal Logical Design Engineer
Bristol, UK·Physical Systems
Graphcore1mo
Director - Post-Silicon Validation (Functional)
Austin, Texas, United States·Physical Systems
Graphcore1mo
Silicon Verification Engineer
Bristol, UK; Cambridge, UK·Physical Systems